The disclosure herein relates to semiconductor modules. More specifically, the disclosure is directed toward a semiconductor module that includes multiple memory die and at least one buffer die, all mounted on a common substrate.
Some conventional memory modules include multiple semiconductor memory die electrically coupled to a buffer die, where the multiple memory die and the buffer die are typically aligned in a linear configuration on a circuit board. This linear configuration, however, results in electrical interconnections of different lengths between the buffer die and each of the memory die. These differences in the lengths of the interconnections may skew the transmission signals to and from the various memory die, i.e., affect the timing or phase of the transmission signals. This skew is particularly problematic for high speed transmission signals. In addition, the linear configuration of the memory die and buffer die results in a larger than desired footprint on the circuit board.
One method of achieving a smaller footprint while increasing the number of memory die is to stack memory die on top of the buffer die. However, this method impedes heat dissipation at each memory die and buffer die. Still further, a stacked configuration increases the thickness of the module, which is of particular concern in smaller computing systems, such as laptop and notebook computers.
As such, it would be highly desirable to provide a semiconductor module that includes buffered signal transmission to multiple memory die, while addressing the aforementioned drawbacks of conventional modules.
Like reference numerals refer to the same or similar components throughout the several views of the drawings.